Parkade Counter
Circuit Documentation

Project Diagrams

This page now uses the local image set from the project folder instead of placeholders. The diagrams cover the complete schematic, stage-level views, parking-layout references, and the high-resolution system concept render.

Diagram 01
Complete System Schematic
End-to-end schematic of the detector input, CD40110BE counting chain, seven-segment outputs, decoder logic, relay switching, and flashing red timer path.
Diagram 02
Parking Flow Overview
Top-level parking illustration showing the count-up entrance, count-down exit, and how vehicle movement maps onto the sensing logic.
Diagram 03
Stage 1 Detector Schematic
Close-up stage view of the IR detector network with transistor conditioning, resistor values, switch logic, and sensor state explanation.
Diagram 04
Stage 2 Counter Interface
Counter stage showing the two CD40110BE devices, reset path, resistor banks, and the common cathode seven-segment display connections.
Diagram 05
Stage 3 LED Status Logic
Decoder and full-capacity warning stage with logic gates, relay drive, flyback diode, transistor switching, capacitor timing, and the NE555 configuration.
Diagram 06
Parking Sensor Layout
Top-level parking layout showing how the entry and exit sensors frame the count-up and count-down path through the lot.
Diagram 07
Partition Overview
High-level architecture image that matches the project-partition PDF and makes the three-stage structure easier to discuss before drilling into the full schematic views.
Diagram 08
System Concept Render
High-resolution concept render summarizing the IR gates, displays, major ICs, and the three-status LED outputs in a single visual reference.